Help with IC and SLL instructions



High Level Assembler(HLASM) for MVS & VM & VSE

Help with IC and SLL instructions

Postby ramkumar1992sp » Tue Dec 06, 2016 2:28 am

Hello Experts,

I have the below code in my program and I'm trying to understand what they are doing.


IC R9,0(RB)
SLL R9,23(RA)
 


With the IC instruction,We are moving the contents from the zeroth displacement of Register RB to the 24-31st bit position of R9.

Suppose RB has a value of 00001010 00000000 00000000 00000000 ,we would move 00001010 to the 24-31st bit position of R9.

So R9 would now have 00000000 00000000 00000000 00001010.

Now suppose RA has a value of 0.Then SLL R9,23(RA) would shift the contents of R9 by 23 + 0 bits to its left.

so RA would now be 00000101 00000000 00000000 00000000.

So the now the value in register RA is the old contents multiplied by 2 ^ 23.

Can you please confirm if my above analysis is correct?


Thanks,
Ram Kumar
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Re: Help with IC and SLL instructions

 

Re: Help with IC and SLL instructions

Postby steve-myers » Tue Dec 06, 2016 4:01 am

  • With the IC instruction,We are moving the contents from the zeroth displacement of Register RB to the 24-31st bit position of R9.

    No. The IC instruction inserts the contents of the single byte of storage at the address in storage computed by adding 0 to the contents of register RB into bits 56 to 63 of the 64-bit general register R9. The remaining 56 bits are not altered. Bits 32 to 63 represent the the traditional 32 bit System/360 register. Click here and actually READ the discussion in a slightly back level Principles of Operation.
  • Your understanding of the shift instructions is also flawed. For more than 40 years I've never figured out why the second operand is specified as a pseudo address. Possibly it was because the bits were available in the instruction and the engineers thought it might be a good idea to make the shift amount variable. Click here to actually READ the discussion of the instruction.
After you have corrected your program fragment, post the new fragment here and someone will let you know.

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Re: Help with IC and SLL instructions

Postby ramkumar1992sp » Tue Dec 06, 2016 8:52 pm

Thanks Steve.I read these instructions from the principles of operations before posting it here.I found it confusing as it was talking about bit positions 56 to 63.

your mentioning of "Bits 32 to 63 represent the the traditional 32 bit System/360 register" has helped.

Now this means that 56 to 63 bit positions would represent the 24 to 31 bit positions of a 32 bit register ?

so the below is how it works..correct?
"Suppose RB has a value of 00001010 00000000 00000000 00000000 ,we would move 00001010 to the 24-31st bit position of R9.

So R9 would now have 00000000 00000000 00000000 00001010. "


I have been reading instruction set at the below link as I find it easier to understand than the manual.

http://csc.columbusstate.edu/woolbright/WOOLBRIG.htm


For SLL instruction,I read that the shift factor is calculated by the contents of Register and the displacement.It says the rightmost 6 bits is used for shift factor.

So far I havent seen any SLL examples on the internet that went with a displacement of 23.

Also I m not correcting the existing Assembler progran.I'm trying to understand what its doing and replace it with a COBOL program.

Thanks for your help.
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Re: Help with IC and SLL instructions

Postby steve-myers » Tue Dec 06, 2016 10:14 pm

  • Now this means that 56 to 63 bit positions would represent the 24 to 31 bit positions of a 32 bit register ?
    Correct. I, too, found this very confusing. I still find it confusing. At first I tried using “ESA/390 Principles of Operation,” but that's getting rare on the Internet, so now I just stay with z/Architecture. Sigh.
  • "Suppose RB has a value of 00001010 00000000 00000000 00000000 ,we would move 00001010 to the 24-31st bit position of R9.
    This is more like a right shift, or perhaps a rotate with a different shift value, which was not in System/360.
  • So far I havent seen any SLL examples on the internet that went with a displacement of 23.
    In 40+ years I haven't seen a SLL to shift 23 bits too. Several IBM macros do a SLL 24. The ABEND macro in particular.
  • ”I have been reading instruction set at ... as I find it easier to understand than the manual.”
    I agree that Principles of Operation is often very hard to understand. You must understand it is trying to express all possible cases in as few words as possible. However, it is complete.

    I don't use Mr. Woolbright's site as I am afraid it will disappear with little, if any notice. Another issue with the site is it over simplifies things, where I often find I need the high level of detail in the manual.
  • ”Also I m not correcting the existing Assembler progran.I'm trying to understand what its doing and replace it with a COBOL program.”
    Personal opinion. This is a fool's project initiated by a management that is convinced Assembler is evil. I can't try to convince idiot managers it is not a good idea to transform Assembler into Cobol. Many things in Assembler cannot translate well into Cobol anyway.

    I have never tried to learn Cobol. One of my first contacts with Cobol was with an operator trying to learn Cobol. He was printing the generated Assembler of his program. This was OS/360 Cobol F. I was impressed that there was little use of external subroutines in the generated code – much less than I sort of expected.

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Re: Help with IC and SLL instructions

Postby ramkumar1992sp » Tue Dec 06, 2016 10:28 pm

Thanks Steve!
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Re: Help with IC and SLL instructions

Postby ramkumar1992sp » Wed Dec 07, 2016 12:53 am

Hello,

If it was 24 instead of 23 on the SLL instruction and if the contents of RA register is 0 then the below code would be moving the first 8 bit contents of RB Register to first 8 bit contents of R9 Register and rest of R9 will be zero.Isn't this correct?

IC R9,0(RB)
SLL R9,24(RA)




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Re: Help with IC and SLL instructions

Postby steve-myers » Wed Dec 07, 2016 1:48 am

NO. This has already been discussed. The one byte in the storage address determined by adding 0 to the contents of register RB is loaded unto bits 56 through 63 of register R9. The remaining 56 bits of register R9 are not altered. Since we do not know the all the contents of registers R9 and RA before the SLL executes it is not able to predict the contents of register R9 after the SLL executes. IF the contents of register WA is 0 before the the SLL instruction executes, then we can definitely state the contents of bits 40 through 63 of register R9 will be 0.

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