## The Branch on Condition Instruction

High Level Assembler(HLASM) for MVS & VM & VSE

### The Branch on Condition Instruction

A machine instruction that has confused many beginning Assembler programmers is the Branch on Condition instruction.

At least in concept it is a simple instruction.

Many machine instructions alter a hardware data area called the condition code. The condition code has 2 bits. Since it has 2 bits it can have 4 values: 00 (0), 01 (1), 10 (2), and 11 (3). The Principles of Operation manual dutifully lists, in each instruction definition, the condition codes the instruction can set. It uses the decimal code, rather than the bit code, which may be a mistake. In 50+ years, few, if any beginners memorize the condition codes the instructions set. Fifty years ago, I didn't do this! To this day I ignore the little table, which has caused me trouble from time to time. Fortunately, 50 years ago the hardware designers designed a pattern in the condition code settings that have helped generations of Assembler programmers. As an example, this is the condition code table for the binary compare instruction.

Resulting condition code:

0 Operands equal
1 First operand low
2 First operand high
3 ---

The Branch on Condition instruction provides a 4 bit mask. Each bit in the mask corresponds to a condition code setting. If the bit position that corresponds to a condition code setting is on, the instruction branches. This table shows the BC mask and the corresponding condition code.
BC  Condition
1000    00
0100    01
0010    10
0001    11

If more than 1 bit is specified, the instruction tests each condition code. In other words, if the mask is 1100, the instruction will branch if condition code 00 or 01 is set.

Perhaps in desperation, many Assembler programmers 50 years included these symbols in their programs.
E        EQU   B'1000'             EQUAL
NE       EQU   B'0111'             NOT EQUAL
Z        EQU   B'1000'             ZERO
NZ       EQU   B'0111'             NOT ZERO
L        EQU   B'0100'             LOW
NL       EQU   B'1011'             NOT LOW
M        EQU   B'0100'             MINUS OR MIXED (AFTER TM)
NM       EQU   B'1011'             NOT MINUS OR NOT MIXED (AFTER TM)
H        EQU   B'0010'             HIGH
NH       EQU   B'1101'             NOT HIGH
P        EQU   B'0010'             PLUS
NP       EQU   B'1101'             NOT PLUS
O        EQU   B'0001'             OVER FLOW OR ONES (AFTER TM)
NO       EQU   B'1110'             NOT OVER FLOW OR NOT ONES (AFTER TM)
Using these symbols a programmer could write code like this
C     5,=F'200'
BC    H,ITSHIGH

rather than
C     5,=F'200'
BC    2,ITSHIGH

Clearly the first example is easier to understand than the second. It didn't take too long for the the Assembler to create a series of "extended branch" instructions that incorporated the EQU instructions, so BH location became the equivalent of BC 2,location.

Glancing through the BC mask EQU symbols, it's possible to discern the condition code pattern. The AL and SL instructions break the pattern, and other instructions, like TRT, while not exactly breaking the pattern, add to it in possibly unexpected ways.
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