I don't know any "legal" way for a regular program to obtain the entire PSW. The BAL or BALR instructions can obtain the low order 32-bits, though there is one important caveat about this. To interpret this correctly you must know the current addressing mode. In the 24-bit addressing mode, the bits are arranged as follows -
0 and 1 - The instruction length code, 01 - 2 bytes, 10 - 4 bytes, 11 - 6 bytes (01 means BALR, 10 means BAL)
2 and 3 - The condition code.
5 to 8 - The program mask.
9 to 31 - The updated instruction counter.
In the 31-bit addressing mode -
0 - Always 1
1 to 31 - The updated instruction counter.
In all addressing modes you can use the IPM instruction to get the condition code and program mask, arranged in the register as in the 24-bit addressing mode. The instruction length code area will be 00, per Principles of Operation.
In all addressing modes, you can use the SPM instruction to forcibly set the condition code and program mask, though the SPIE macro provides a more "legal" way to set the program mask. IPM dates back to XA architecture, SPM was in the original System/360.
Of course you can always establish a STAE exit, force an ABEND, and get the PSW from the SDWA passed to the ESTAE exit, but I doubt that's what you had in mind.