IBM Mainframe Forum

tetra wrote:...
SR 2,2 - It's like doing the zero in register 2
L 2,SUM

Yes, I know SR 2,2 stores binary 0s in register 2, but since the very next instruction loads 32 bits of something into the register, why set it to 0s first? The first computer I worked with was the IBM 7040. It did not have a Load instruction. It had a CLear and Add (CLA) instruction; CLA did exactly what the name says.

There are times when something similar is appropriate. For example

SR 2,2
ICM 2,B'0011',SUM

This Insert Characters under Mask instruction replaces bits 16 through 31 of the 32-bit register 2 with the 2 bytes at SUM, so it is appropriate to set bits 0 through 15 before the ICM instruction. Your thought about a "macro" is interesting, but incorrect. For exampledefines a macro and then uses it. The Assembler inserts a + into its listing to indicate the instruction came from the macro.

IBM macros often expand into dubious code. One macro, for example, generatesThe XC instruction is just a slow way of setting 116 bytes to binary 0s. The data area is frequently specified within the macro, though there is a way to specify the data area somewhere else. If the data area is built as part of the macro definition, why not define it as binary 0s and forget the XC and MVC instructions? Actually there is a reason: the macro is often used in a loop, and the data area is altered by the system service the macro invokes, so the macro must reset the data area. Still, it does not explain the MVC.

Many years ago the PUT and GET macros generated

+ L 15,48(1)

Suddenly, for no obvious reason, it changed to

+ SLR 15,15
+ ICM 15,7,49(1)

The L instruction was dubious enough. It really should have been

+ L 15,48(,1)

The L instruction in the old macro directs the hardware to add the contents of "index" register 1 to what amounted to binary 0s to compute the address; on some of the slower machines of that era this was slower than the more correct form I showed, which uses a base register but no "index" register.

Then why the "new" expansion, which is still used today? After all, it uses 2 instructions rather than 1, and the ICM instruction is slower than the L instruction. The reason: in future (MVS/XA) systems, it allowed the macro to run correctly when the hardware was running AMODE 31. For a time there was sometimes a debate about whether SLR reg,reg was "better" than SR reg,reg. Part of the debate hinged on the fact SR could get an overflow interruption and SLR does not have a potential overflow interruption, but this is not an issue with SR reg,reg: no matter what is in the register the result will be binary 0s. I think some people claimed SLR was faster, though even on very slow machines the difference, if any, was minuscule. In the 1960s, IBM published instruction times for all their machines, something it no longer does.

Robert Sample wrote:... Your list of speed improvements did not include the LA instruction, but it should.

Mr. Sample is correct, though there is a roughly equivalent alternate that some people regard as better.
Mr. Sample proposes

LA 4,4(,4)

rather than

A 4,INDEX

I propose

AHI 4,4

There are two possible issues with the LA solution

• When the machine is running AMODE 24, the maximum value you can store in reg 4 is limited to 24 bits, 16 meg in other words.
• LA uses the addressing adder rather than the main adder. Since most instructions use the addressing adder, using LA serializes the addressing adder.

Like the LA instruction, AHI introduces a value from the instruction stream, thus avoiding a storage reference. AHI uses the main adder rather than the addressing adder, thus avoiding the serialization issue I just mentioned, and it sets the condition code, which LA does not. This is a two edge sword; I have code where another instruction sets the condition code, followed by a LA instruction, and then a BC instruction using the condition code from the instruction before the LA.

Another advantage of LA is the addressing adder is potentially a three input adder; the displacement, the "base" register and the "index" register.

Well, that's enough for a Friday evening.

Yes, I miss that the L instruction replace the contents and that's why I use the SR instruction...

You are right. The LA instruction with using adresses is quicker.

Ok..
Now I have this code

You continue to ignore what you are told. After the STore command is complete, your code will then attempt to execute the INDEX data; you might get an abend or you might get something else -- but whatever you get, it is NOT what you want. What you need is something like to return to the calling program (which may be the operating system). Also, how will you determine whether or not your program is working correctly -- you have nothing to display the results in your code so far?

You need to learn the calling conventions for Assembler programs -- you do not have your save areas linked properly; the LM 14,12,12(13) / BR 14 code has been standard exit code for Assembler for many, many, many years

As Mr. Sample says: your entry / exit code is incorrect. This has not changed in almost 50 years, and it is unlikely to change.

For some reason, it is not taught, taught incorrectly, or students ignore it.

1. Register conventions at entry of a program or subprogram
   
   Select all

   Register Contents
      1     Address of the parameter list
     13     Address of a "standard" 72 byte save area
     14     Address of the next instruction to execute
            when your program completes
     15     Address of your program
2. What you must do
   Unfortunately, there are a couple of variations
   • Your program does not call other programs or use the system I/O macros
     This is the simplest case. It must save the registers it will modify. and restore them to their original contents before it returns.
   • Your program calls other programs or uses system I/O macros
     This is more complex . Before the first time your program calls another program or uses a system I/O macro it must store the address of a new 72 byte save area in register 13, and it should connect the new save area to the save area chain. This is usually done at the beginning of the program. The full save area chain has your save area pointing to the save area AND the save area your program received when it was called pointing to your save area. Since the program that called your program does not know where the save area your program will establish, your program must store this pointer.
     Select all

     SUM      CSECT
              USING *,12
              SAVE  (14,12),,*
              LR    12,15
              LA    15,SAVEAREA
              ST    13,4(,15)
              ST    15,8(,13)
              LR    13,15
              ...
              L     13,4(,13)
              RETURN (14,12),T,RC=0
              ...
     SAVEAREA DC    18F'0'
     
     The USING instruction is a promise to the Assembler that the register you specify in the USING instruction contains an address
     
     USING *,12
     
     This USING instruction tells the Assembler that register 12 will contain the current address.
     
     The SAVE macro saves the registers you specify in the register save area specified by register 13. It can also establish a program identifier text.
     
     SAVE (14,12),,*
     
     The '14,12' is a register pair used in a STM instruction to actually save the registers. The * at the end of the instruction is a code that tells the macro to use the current section name as the program identifier.
     
     Remember the USING instruction? It was a promise to the Assembler that register 12 will have the address of the current location - the start of the program. Now we must put something there.
     
     LR 12,15
     
     By convention, register 15 is the start of the program, and we have told the Assembler register 12 will have this address in it.
     
     Next we prepare a new save area.
     
     LA 15,SAVEAREA
     
     The LA (Load Address) instruction directs the machine to use register 12 (the base register established by the USING instruction) and an offset computed by the Assembler to compute the address of the new save area and store it in register 15, which is now not needed since it was saved in the current register save area and used to set register 12.
     
     ST 13,4(,15)
     
     The ST (Store) instruction directs the Assembler to create an instruction st store the contents of register 13 (the address of the save area the caller provided) at the address computed by adding 4 to the contents of register 15 (the address of the new save area).
     
     ST 15,8(,13)
     
     This ST instruction directs the Assembler to create an instruction to store the contents of register 15 (the address of the new save area) at offset 8 from the contents of register 13. Strictly speaking, you don't have to do this,though by doing it you can establish a trace of program activity.
     
     LR 13,15
     
     Finally we complete "standard" program entry. LR (Load Register) directs the Assembler to create an instruction to copy the address of the new save area in register 15 to register 13.
     
     Now your program has done some useful work and it is time to return to the program that called it.
     
     L 13,4(,13)
     
     The L {[u]L[/o]oad) instruction directs the Assembler create an instruction to load the contents of storage that is located at offset 4 from the contents of register 13 - the current save area. In other words, we are loading the address of the save area provided by the caller ubto register 13.
     
     RETURN (14,12),T,RC=0
     
     RETURN is a standard IBM macro. '14,12 is a register pair used in a LM instruction. T directs the RETURN macro to flag the save area as no longer in use. RC directs the macro to supply a return code in register 15 rather than the original contents of register 15. You can also specify RC=(15) to indicate that the return code is already in register 15.
     
     SAVEAREA DC 18F'0'
     
     The DC instruction directs the Assembler to define a data area containing 18 32-bit words containing vinary 0s/